entity TO1_HelloWorldTb is (in vhdl newlines and spaces are treated equally)
end entity;
architecture sim of TO1_HelloWorldTb is (architecture is where we put most of our logic and our algorithms inside)
begin
process is
begin
report (keyword) "Hello World!";
wait;
end process;
end architecture;
end entity;
architecture sim of TO1_HelloWorldTb is (architecture is where we put most of our logic and our algorithms inside)
begin
process is
begin
report (keyword) "Hello World!";
wait;
end process;
end architecture;
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